clk/2 -> 2
From /2, 0.125 steps may be taken.
The fractional part has frac_code encoding
+
+ value[13:0] of value is the divisor
+ index[9] mean 12 MHz Base(120 MHz/10) rate versus 3 MHz (48 MHz/16) else
+
+ H Type have all features above with
+ {index[8],value[15:14]} is the encoded subdivisor
+
+ FT232R, FT2232 and FT232BM have no option for 12 MHz and with
+ {index[0],value[15:14]} is the encoded subdivisor
+
+ AM Type chips have only four fractional subdivisors at value[15:14]
+ for subdivisors 0, 0.5, 0.25, 0.125
*/
static int ftdi_to_clkbits(int baudrate, unsigned int clk, int clk_div, unsigned long *encoded_divisor)
{
best_divisor = divisor/2;
if(best_divisor > 0x20000)
best_divisor = 0x1ffff;
- best_baud = clk*8/clk_div/best_divisor;
+ best_baud = clk*16/clk_div/best_divisor;
+ if (best_baud & 1) /* Decide if to round up or down*/
+ best_baud = best_baud /2 +1;
+ else
+ best_baud = best_baud /2;
*encoded_divisor = (best_divisor >> 3) | (frac_code[best_divisor & 0x7] << 14);
}
return best_baud;
}
// Split into "value" and "index" values
*value = (unsigned short)(encoded_divisor & 0xFFFF);
- if (ftdi->type == TYPE_2232C || ftdi->type == TYPE_2232H ||
+ if (ftdi->type == TYPE_2232H ||
ftdi->type == TYPE_4232H || ftdi->type == TYPE_232H )
{
*index = (unsigned short)(encoded_divisor >> 8);