Hi,
Just as a reminder first, I have the MorphIC-II board from FTDI that I am
working with. On this board, the following pins are connected to FPGA
programming pins:
BD[0] = DCLK
BD[1] = DATA0
BD[2] = NCONFIG
BD[3] = NSTATUS
BD[4] = CONF_DONE
BD[7] = DEV_RST
I am then observing the FPGA activity with signaltap. After setting bits in
port B with Bitbang mode, I then try to "reset" BITBANG mode with these calls:
ftdi_set_bitmode(&ftdic2, 0x0, BITMODE_RESET);
ftdi_usb_close(&ftdic2);
If I just use the usb_close call, everything seems to work just fine. But when
I use the first call to set_bitmode to reset, signaltap then says "invalid jtag
configuration" which seems to indicate to me that the FPGA was reconfigured. So
this leaves me to believe that the NCONFIG pin had been toggled, which would be
BD[2]. But of course any of the others I wouldn't notice, so they might have
toggled as well.
Jo
On 8/18/2011 3:07 AM, Uwe Bonnes wrote:
>>>>>> "Joachim" == Joachim Schambach <jschamba@xxxxxxxxxxxxxxxxxx> writes:
> Joachim> I tried this, basically put a "getchar()" call in between
> Joachim> writing to the port and resetting it, and it still reset the
> Joachim> FPGA, i.e. some data pins got toggled when resetting the pin.
> Joachim> Cheers, Jo
>
> What pins toggle?
>
> Perhaps we habe some differences in the shutdowb sequence...
--
Dr Joachim Schambach tel: x1 512 471 1303
The University of Texas at Austin fax: x1 814 295 5111
Department of Physics email: jschamba@xxxxxxxxxxxxxxxxxx
1 University Station C1600
Austin, Texas 78712-0264, USA
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