libftdi Archives

Subject: Re: ftdi_set_bitmode question

From: Joachim Schambach <jschamba@xxxxxxxxxxxxxxxxxx>
To: libftdi@xxxxxxxxxxxxxxxxxxxxxxx
Date: Wed, 17 Aug 2011 10:50:15 -0500
I tried this, basically put a "getchar()" call in between writing to the port
and resetting it, and it still reset the FPGA, i.e. some data pins got toggled
when resetting the pin.
Cheers,
Jo

On 8/17/2011 6:04 AM, Uwe Bonnes wrote:
>>>>>> "Joachim" == Joachim Schambach <jschamba@xxxxxxxxxxxxxxxxxx> writes:
>     Joachim> I might have found the problem after all.  It is not the
>     Joachim> setting of the BITBANG mode that messes up the FPGA, but the
>     Joachim> reset to FIFO mode.  When I just leave the second interface in
>     Joachim> BITBANG mode and simply close it after setting all necessary
>     Joachim> bits, everything works.  Thanks for everyone's help on this....
>
> Can you try to sleep a little before you reset the device? It takes some
> time until the write-FIFO is writen to the external device. If the write
> fifo is not empty when resetting/closing the device, strange things may
> happen.
>
> Bye

-- 
Dr Joachim Schambach                 tel: x1 512 471 1303
The University of Texas at Austin    fax: x1 814 295 5111    
Department of Physics                email: jschamba@xxxxxxxxxxxxxxxxxx
1 University Station C1600
Austin, Texas 78712-0264, USA


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