On Aug 27, 2010, at 2:58 PM, Michael Plante wrote:
>>> Well, if I'm setting it to 0x00 effectively, that also explains why
>>> the second chip select (ADBUS4) goes low as well. But if I change
>>> that "0 & ~cs_bits" to a conditional to 0x10, it doesn't keep ADBUS4
>>> high as I would expect.
> Hrm. Assuming you send 0x80 0x10 0x1b , ADBUS4 should go high, and /CS
> should go low. Are you saying that isn't happening?
Ok, I have it now where for the register writing and reading, things are as
they were before, and after that I send 0x80, 0x10, ad 0x1b. I do this
While doing the registers, I'll see both ADBUS3 (CS) and ADBUS4 go low, the
clock squiggles, and I can see MOSI or MISO send out data (not both at the same
time, I only have 4 channels).
Then when I try the above, I only see the clock. I'm not sending anything on
MOSI, so I wouldn't expect anything there. But both ADBUS3 and 4 stay low. I
really don't get it. I've triple-checked the lead wires, to make sure they're
not shorted together or anything dumb like that.
My software can set them high, or leave them low, it would seem... but not
independently of each other.
>>> It happens to be low, both ADBUS3 and 4 are, for the duration of
>>> my successful spi commands, only going high again once the SPI
>>> command is over. But the radio chip defaults to config. Ugh.
> What does "defaults to config" mean?
According to the radio datasheet, if both are low, it's the same as having
nss_config low. If both are high, you get nothing. The only way to get nss_data
is to have it low, while nss_config is high.
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