I have a board with a FT2232H and a Xilinx XC3S200A. Let me report some
findings and problems.
- The FT2232H timing with the supplied 60 MHz clock and the 11 ns seconds
Setup and 0 ns hold timing is tough. Be sure to route the clock to an FPGa
global clock input ping and write the code so that data and write can use the
registers in the output pad, clocked by the 60 MHz clock
- if you don't use an DCM the data and write output need to be fast and
strong, or you won't meet the timing
- I programmed the FPGA to send out some ascii pattern as fast as
possible. The first and last 5 characters is a consecutive number, the rest
- the appended libftdi programm reads quite fast (16...24 MByte/sec), but
scrambles data blocks (probably 512 byte blocks )
> examples/sync_fifo -n 1000 -o test
Read 16384000 bytes in 0.873 s, 18770543 bytes / sec
> cut -b 6-99 test | sort | uniq -c
- the appended libftd2xx program runs without error on windows, but with
only 6 to 9 MByte/sec speed
> cut -b 6-99 t1 | s
ort | uniq -c
- the same libftd2xx program run on Linux crashed inside libftd2xx
when I read "to many" datablocks
> ./a.out -n 1000 -o test
Should be in SYNC FIFO mode now
Speicherschutzverletzung (== SIGSEG)
- slowing down the FPGA in putting bytes into the FIFO didn't stop the libftdi
program from scrambling datablock.
I use libftdi git-head, Linux64 on AMDx2 6400 and the Windows machine has XP
and a Pentium M 1700.
Any idea how I can stop libftdi from scrambling data blocks.
I will try to write a pure libusb(1) solution meanwhile.
Uwe Bonnes bon@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
libftdi - see http://www.intra2net.com/en/developer/libftdi for details.
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