libftdi Archives

Subject: Re: SPI clock issue?!?

From: Ed <spied@xxxxxxxxx>
To: libftdi@xxxxxxxxxxxxxxxxxxxxxxx
Date: Wed, 27 Jun 2012 22:29:50 +0400
I found the solution (really it is stollen from libmpsse).

CLK bit must be set correctly _before_ transmittion start.
Working example for ds1305 IC:

int main(int argc, char **argv)
{
    struct ftdi_context ftdic;
    char buf[16];
    int i;

    ftdi_init(&ftdic);
    ftdi_usb_open(&ftdic, DEVICE_VID, DEVICE_PID);
    ftdi_set_interface(&ftdic, INTERFACE_A);
    ftdi_usb_reset(&ftdic);
    ftdi_set_bitmode(&ftdic, 0, 2);
    i=0;
    buf[i++] =  0x8a;
    buf[i++] = 0x86;
    buf[i++] = 29;   // 1MHz
    buf[i++] = 0x00;
    ftdi_write_data(&ftdic, buf, i);
    i=0;
    buf[i++] = SET_BITS_LOW;
    buf[i++] = 0x18; // CLK is now 0
    buf[i++] = 0x1B;
    buf[i++] = SET_BITS_LOW;
    buf[i++] = 0x19; // CLK is now 1
    buf[i++] = 0x1B;
    buf[i++] = 0x10; // we start transfer on rising edge
    buf[i++] = 1;    // two bytes
    buf[i++] = 0;
    buf[i++] = 0xB3;
    buf[i++] = 0x55;
    ftdi_write_data(&ftdic, buf, i);
    ftdi_usb_close(&ftdic);
    ftdi_deinit(&ftdic);
}

Many thanks to Craig Heffner (libmpsse author).

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