First off, my apologies on the recent html mail I had sent. I've since tamed my
mail client.
On to business...
We use the SX1211 in several of our embedded products, and I've talked with the
engineers who worked on the firmware for those... it's fairly plain in its SPI
implementation and by itself with a Pic microcontroller, there are no real
funkiness issues.
And I've also read up on the FTDI chip... no one has discovered any bizarreness
there.
But the interaction of the two is about to drive me insane. I very nearly have
a complete linux device driver for this thing... and the only remaining
stumbling block is that when I read data out of the Semtech FIFO (one byte at a
time, spi) the first two bytes will be leftover garbage from when I was
writing to the registers. It's only ever two bytes. Then I read 11 more bytes,
and these are correct, coming from the FIFO.
At this point, the Semtech chip has counted 13 reads, which is how many bytes
were available in the FIFO... and it sets the interrupts low to indicate I've
read the full packet. Only I'm still missing two bytes (but they're not gone!).
Now, some few seconds later, the interrupts go high again (I'm using
ftdi_read_pins() to check them), so I try to read from the FIFO again. The
first two bytes I'll get this time are the last two from the last transmission.
Then I'll get 11 bytes of the current transmission, and the interrupts go low
signaling that I've read all 13 bytes. Repeat ad infinitum.
When I have it hooked up to the scope, I can see that when I read them, I'm
setting my chip select correctly, and that the clock really wiggles back and
forth. I should get that (read) byte immediately back on MISO. But instead, I
always seem to get back the byte I should have gotten two times before.
Changing latency (I've tried 1-10, 16, 32, 64, and 255) doesn't alter this.
Changing the speed of the clock doesn't seem to alter this very much (though, a
few speeds seem to prevent reads altogether). Nothing seems to change this.
Doing more reads to attempt to skew things back in the right direction doesn't
seem to have any effect, either.
Is there some internal buffer in the FT2232D or something? I can't find
anything like that in the data sheet. (and besides, every SPI read I tack on an
0x87 send immediate). I'm really at my wit's end, and none of this makes much
sense. I can see what's happening, but I don't understand how it's possible.
For those who have been keeping up with my messages on the mailing list, this
is almost certainly the problem I described poorly from early on when I was
attempting to read the registers, and would see the values skewed back by
several read attempts.
Any insight appreciated.
Thanks,
John O.
--
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