On Mon, Feb 22, 2010 at 10:16 PM, Xiaofan Chen <xiaofanc@xxxxxxxxx> wrote:
> On Mon, Feb 22, 2010 at 10:08 PM, Jan Wilmans <janwilmans@xxxxxxxxx> wrote:
>
>> But what I think you mean is: data is being read from the FT245
>> simulatiously,
>> so whilest packets arrive, the receive buffer is being read and more then 4
>> packets (up to 19 is the hardware reads fast enough) can be send in 1 ms?
>> Greetings,
>
> I do not know how the internal of FT245R works. But for USB bulk transfer
> multiple (up to 19) packets (each packer is 64Bytes max for full speed bulk
> endpoint) can be done in one transfer (1 frame, 1ms).
>
> I can imagine the following.
> The receive buffer can hold two 64bytes packets, each frame (1ms)
> they can receive up to 19 USB packets of 64bytes (9 x full
> 128 byets full buffer plus one 64 bytes partial buffer) in theory.
> In reality, maybe it is less. And there are some overhead involved.
>
To put it this way, the USB SIE is fast enough (up to 1216 bytes/ms),
if the FIFO engine is fast enough, then it can transmit and receive
what the USB SIE is capable of.
In reality the data rate is lower due to some overhead and some
internal latency of the chip. The driver plays a big part as well.
http://www.ftdichip.com/Documents/AppNotes.htm
http://www.ftdichip.com/Documents/AppNotes/AN232B-03_D2XXDataThroughput.pdf
http://www.ftdichip.com/Documents/AppNotes/AN232B-04_DataLatencyFlow.pdf
--
Xiaofan http://mcuee.blogspot.com
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